EPM3512ATC256-10N vs EPM3512AFC256-10N Comparison

Detailed side-by-side comparison of EPM3512ATC256-10N by Altera and EPM3512AFC256-10N by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPM3512ATC256-10N EPM3512AFC256-10N
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $20.10 $43.22
Family MAX 3000A MAX 3000A
Device Type CPLD (Complex Programmable Logic Device) β€”
Macrocells 512 512
Logic Array Blocks (LABs) 16 [DATA_NEEDED: number of LABs]
Maximum User I/O Pins 208 β€”
Package FBGA-256 (FineLine BGA, 17x17 mm, 1.0 mm pitch) 256-ball FBGA (17 mm x 17 mm)
Propagation Delay (tPD1) 10 ns β€”
Core Supply Voltage (VCCINT) 3.3 V β€”
I/O Supply Voltage (VCCIO) 1.8 V / 2.5 V / 3.3 V / 5.0 V (MultiVolt) β€”
Programming Interface JTAG (IEEE Std. 1149.1) - in-system programmable β€”
Operating Temperature 0 C to +70 C (commercial, "C" suffix) β€”
Process Technology 0.30 um CMOS EEPROM β€”
Mounting Type Surface Mount Surface Mount (BGA)
RoHS Status unknown [DATA_NEEDED: RoHS status]
Lead-Free unknown β€”
Usable Gates β€” 10000
User I/O Pins β€” 208
Operating Frequency (fMAX) β€” [DATA_NEEDED: fMAX MHz]
Pin-to-Pin Delay (tPD) β€” 10 ns
Setup Time (tSU) β€” 4.5 ns
VCCINT (Core Supply) β€” 3.3 V
VCCIO (I/O Supply) β€” 3.3 V or 2.5 V
Technology β€” CMOS EEPROM-based, non-volatile
Operating Temperature (Commercial) β€” 0 C to +70 C
ISP Interface β€” IEEE Std. 1149.1 JTAG, IEEE Std. 1532
MSL Level β€” [DATA_NEEDED: MSL rating]

Datasheets & Resources

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