EPM5016DC-15 vs EPM5016PC-1 Comparison

Detailed side-by-side comparison of EPM5016DC-15 by Altera and EPM5016PC-1 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPM5016DC-15 EPM5016PC-1
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $10.75 $9.95
Device Family MAX 5000 β€”
Product Type EPLD (Erasable Programmable Logic Device) β€”
Macrocells 16 16
Logic Array Blocks (LABs) 2 1
Dedicated Inputs 4 β€”
User I/O Pins 12 β€”
Pin-to-Pin Delay (tpd) 15 ns β€”
Maximum Frequency (fmax) 71 MHz β€”
Supply Voltage (VCC) 4.75 V to 5.25 V 4.75 V to 5.25 V
Programming Voltage (VPP) 12.75 V β€”
Operating Temperature 0 Β°C to 70 Β°C (commercial) 0 C to +70 C (commercial)
Package Ceramic DIP-24 (windowed) PDIP-20 (plastic DIP, through-hole)
Mounting Type Through-Hole β€”
Process Technology CMOS EPROM β€”
Configuration Memory Non-volatile UV-erasable EPROM CMOS EEPROM (UV-erasable)
RoHS Status [DATA_NEEDED: RoHS status - pre-RoHS era part, likely non-compliant] Non-compliant (PDIP with SnPb leads, pre-RoHS era)
Lead Finish [DATA_NEEDED: lead-free status] β€”
Family β€” MAX 5000 EPLD
Usable Gates β€” 200
Propagation Delay (tPD) β€” 35 ns
Maximum Frequency (fMAX) β€” 62 MHz
Setup Time (tSU) β€” [DATA_NEEDED: setup time ns]
Supply Current (ICC) β€” 50 mA typical
Pin Count β€” 20
Programming Interface β€” Altera 4-pin JTAG-style (MasterBlaster / ByteBlaster)

Datasheets & Resources

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