EPM5016DC-17 vs EPM5016DC-20 Comparison
Detailed side-by-side comparison of EPM5016DC-17 by Altera and EPM5016DC-20 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EPM5016DC-17 | EPM5016DC-20 |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $16.20 | $16.50 |
| Family | MAX 5000 | MAX 5000 |
| Macrocells | 16 | 16 |
| Logic Elements | [DATA_NEEDED: LE count for MAX 5000 family] | β |
| User I/O Pins (max) | 24 | β |
| Propagation Delay (tPD) | 17 ns | 20 ns |
| Counter Frequency (fCNT) | 67 MHz | β |
| Supply Voltage (VCC) | 5 V | β |
| I/O Standard | TTL-compatible | β |
| Process Technology | 0.75 micron CMOS EEPROM | CMOS, UV-erasable |
| Package | Ceramic DIP-24 (DC suffix) | β |
| Pin Count | 24 | β |
| Mounting Type | Through-hole | β |
| Operating Temperature | 0C to +70C (commercial) | [DATA_NEEDED: operating temperature range] |
| In-System Programmability | Yes (ByteBlaster / BitBlaster) | β |
| Configuration Memory | On-chip EEPROM (non-volatile) | β |
| RoHS Status | [DATA_NEEDED: confirmed compliance status from manufacturer] | [DATA_NEEDED: RoHS compliance] |
| Device Type | β | EPLD (UV-Erasable Programmable Logic Device) |
| Product Terms | β | 160 |
| Dedicated Inputs | β | 7 |
| I/O Pins | β | 8 |
| Maximum Clock Frequency | β | 62.5 MHz |
| Maximum Supply Voltage | β | 5.25 V |
| Nominal Supply Voltage | β | 5.0 V |
| Architecture | β | PAL-type macrocell with Programmable Interconnect Array (PIA) |
| Package Type | β | 20-pin Ceramic DIP (Cerdip) with UV window |
| Package Suffix Code | β | DC = Ceramic DIP, Commercial |
| Speed Grade | β | -20 = 20 ns tPD |
| Programming Method | β | UV erase + EPROM-style programming via Altera programming hardware |