EPM5016DC-20 vs EPM5016LC-17 Comparison
Detailed side-by-side comparison of EPM5016DC-20 by Altera and EPM5016LC-17 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EPM5016DC-20
EPM5016DC-20 - 16-Macrocell MAX 5000 EPLD, 20ns, Ceramic DIP | Altera
EPM5016DC-20 ObsoleteSpecification Comparison
| Parameter | EPM5016DC-20 | EPM5016LC-17 |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $16.50 | $10.95 |
| Family | MAX 5000 | MAX 5000 EPLD |
| Device Type | EPLD (UV-Erasable Programmable Logic Device) | β |
| Macrocells | 16 | 16 |
| Product Terms | 160 | 160 |
| Dedicated Inputs | 7 | 7 |
| I/O Pins | 8 | 8 |
| Propagation Delay (tPD) | 20 ns | 17 ns |
| Maximum Clock Frequency | 62.5 MHz | β |
| Maximum Supply Voltage | 5.25 V | β |
| Nominal Supply Voltage | 5.0 V | β |
| Process Technology | CMOS, UV-erasable | β |
| Architecture | PAL-type macrocell with Programmable Interconnect Array (PIA) | PAL-type with Programmable Interconnect Array (PIA) |
| Package Type | 20-pin Ceramic DIP (Cerdip) with UV window | β |
| Package Suffix Code | DC = Ceramic DIP, Commercial | β |
| Speed Grade | -20 = 20 ns tPD | β |
| Operating Temperature | [DATA_NEEDED: operating temperature range] | [DATA_NEEDED: temperature grade] |
| Programming Method | UV erase + EPROM-style programming via Altera programming hardware | β |
| RoHS Status | [DATA_NEEDED: RoHS compliance] | [DATA_NEEDED: RoHS compliance] |
| Technology | β | CMOS, UV-erasable |
| Total Input Pins | β | 16 |
| Outputs | β | 8 |
| External Clock Inputs | β | 1 |
| Package | β | Windowed Ceramic DIP (LC) |
| Supply Voltage | β | [DATA_NEEDED: VCC range] |
| Logic Compatibility | β | TTL/CMOS |