EPM5032DC-25 vs EPM5032DC Comparison

Detailed side-by-side comparison of EPM5032DC-25 by Altera and EPM5032DC by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPM5032DC-25 EPM5032DC
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Nrnd Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $3.55 $10.40
Manufacturer Altera (Intel Programmable Solutions Group) β€”
Product Family MAX 5000 β€”
Device Type UV Erasable Programmable Logic Device (EPLD) EPLD (Erasable Programmable Logic Device)
Macrocells 32 32
Pin-to-Pin Propagation Delay (tPD) 25 ns β€”
Maximum Counter Frequency (fCNT) [DATA_NEEDED: maximum counter frequency] β€”
Setup Time (tSU) [DATA_NEEDED: setup time] β€”
Number of Dedicated Inputs 32 (in DIP-28 pinout) β€”
Number of I/O Pins 22 (in DIP-28 pinout, 4 used as dedicated inputs) β€”
Package CDIP-28 (Windowed Ceramic DIP-28) DIP-24 (ceramic, windowed)
Process Technology CMOS, EPROM (UV-Erasable) β€”
Architecture PAL-Type, Single-LAB, 32-Macrocell β€”
Output Structure Programmable I/O with output enable β€”
Flip-Flop Configuration D, T, JK, or SR (programmable) β€”
Operating Temperature [DATA_NEEDED: operating temperature range] 0C to +70C
RoHS Status Lead Free / RoHS Compliant (per distributor listings) [DATA_NEEDED: RoHS status]
Programming Method UV erase + Altera/Intel MAX+PLUS II programmer β€”
Erasure Method UV light through ceramic window β€”
Family β€” MAX 5000
Logic Array Blocks (LABs) β€” 1
Speed Grade β€” DC (commercial)
Technology β€” Bipolar EPROM, UV-erasable
Programmable Logic Elements β€” AND array + fixed OR array per macrocell
Configuration Memory β€” EPROM (UV-erasable via package window)
Mounting Type β€” Through-hole (DIP)
Pin Count β€” 24
Programming Tool β€” Altera MAX+PLUS II / A+PLUS legacy
Lifecycle Status β€” Obsolete (mature legacy)

Datasheets & Resources

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