EPM5032DC-25 vs EPM5032DC20 Comparison
Detailed side-by-side comparison of EPM5032DC-25 by Altera and EPM5032DC20 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EPM5032DC-25 | EPM5032DC20 |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Nrnd | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $3.55 | $8.20 |
| Manufacturer | Altera (Intel Programmable Solutions Group) | β |
| Product Family | MAX 5000 | β |
| Device Type | UV Erasable Programmable Logic Device (EPLD) | β |
| Macrocells | 32 | 32 |
| Pin-to-Pin Propagation Delay (tPD) | 25 ns | β |
| Maximum Counter Frequency (fCNT) | [DATA_NEEDED: maximum counter frequency] | β |
| Setup Time (tSU) | [DATA_NEEDED: setup time] | β |
| Number of Dedicated Inputs | 32 (in DIP-28 pinout) | β |
| Number of I/O Pins | 22 (in DIP-28 pinout, 4 used as dedicated inputs) | β |
| Package | CDIP-28 (Windowed Ceramic DIP-28) | 20-pin Ceramic DIP (DC) with UV window |
| Process Technology | CMOS, EPROM (UV-Erasable) | CMOS |
| Architecture | PAL-Type, Single-LAB, 32-Macrocell | PAL-type with Programmable Interconnect Array (PIA) |
| Output Structure | Programmable I/O with output enable | β |
| Flip-Flop Configuration | D, T, JK, or SR (programmable) | β |
| Operating Temperature | [DATA_NEEDED: operating temperature range] | [DATA_NEEDED: operating temperature range] |
| RoHS Status | Lead Free / RoHS Compliant (per distributor listings) | [DATA_NEEDED: RoHS compliance] |
| Programming Method | UV erase + Altera/Intel MAX+PLUS II programmer | β |
| Erasure Method | UV light through ceramic window | β |
| Device Family | β | MAX 5000 |
| Product Type | β | UV-erasable PLD (CPLD class) |
| Usable Gates | β | 600 |
| Propagation Delay (tPD) | β | 20 ns |
| Maximum Frequency (Fmax) | β | 71.4 MHz |
| Supply Voltage (VCC) | β | 5 V (4.75 V to 5.25 V) |
| Dedicated Inputs | β | 7 |
| I/O Pins | β | 16 (bidirectional) |
| Total Inputs (max) | β | 24 |
| Output Macrocells | β | 16 |
| Clock Inputs | β | 1 (global) |
| Mounting Type | β | Through-Hole (DIP) |