EPM5032DC20 vs EPM5032DI25 Comparison
Detailed side-by-side comparison of EPM5032DC20 by Altera and EPM5032DI25 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EPM5032DC20 | EPM5032DI25 |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $8.20 | $11.10 |
| Device Family | MAX 5000 | β |
| Product Type | UV-erasable PLD (CPLD class) | β |
| Macrocells | 32 | 32 |
| Usable Gates | 600 | β |
| Propagation Delay (tPD) | 20 ns | β |
| Maximum Frequency (Fmax) | 71.4 MHz | β |
| Supply Voltage (VCC) | 5 V (4.75 V to 5.25 V) | 5 V (single supply) |
| Dedicated Inputs | 7 | 7 |
| I/O Pins | 16 (bidirectional) | β |
| Total Inputs (max) | 24 | β |
| Output Macrocells | 16 | 16 |
| Clock Inputs | 1 (global) | β |
| Architecture | PAL-type with Programmable Interconnect Array (PIA) | β |
| Process Technology | CMOS | β |
| Package | 20-pin Ceramic DIP (DC) with UV window | 24-pin Ceramic DIP (DI) with quartz window |
| Operating Temperature | [DATA_NEEDED: operating temperature range] | β |
| Mounting Type | Through-Hole (DIP) | β |
| RoHS Status | [DATA_NEEDED: RoHS compliance] | β |
| Family | β | MAX 5000 |
| Device Type | β | UV-erasable EPLD (CMOS EPROM-based) |
| Logic Array Blocks (LABs) | β | 2 |
| Product Terms | β | 320 |
| Bidirectional I/O Pins | β | 16 |
| Total Inputs | β | 24 |
| Pin-to-Pin Delay (tPD) | β | 25 ns |
| Maximum Clock Frequency (fMAX) | β | 62.5 MHz |
| I/O Standard | β | TTL-compatible |
| Programming Technology | β | UV-EPROM (erasable via quartz window) |