EPM5032DI-20 vs EPM5032DC-15 Comparison
Detailed side-by-side comparison of EPM5032DI-20 by Intel and EPM5032DC-15 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EPM5032DC-15 - 600-Gate, 32-Macrocell UV PLD | Altera MAX 5000 | DIP-28
EPM5032DC-15 ObsoleteSpecification Comparison
| Parameter | EPM5032DI-20 | EPM5032DC-15 |
|---|---|---|
| Brand | Intel | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $8.75 | $9.95 |
| Family | MAX 5000 (Altera legacy EPLD) | MAX 5000 |
| Architecture | CMOS PAL-type EPLD with PIA | β |
| Macrocells | 32 | 32 |
| Dedicated Inputs | 7 | β |
| Bidirectional I/O Pins | 16 | β |
| Product Terms | 320 (maximum) | β |
| Flip-Flops | 16 (one per macrocell) | β |
| Maximum Clock Frequency | 62.5 MHz | β |
| Pin-to-Pin Delay | 20 ns (speed grade -20) | β |
| Package | Ceramic DIP-20 (windowed, UV-erasable) | CERDIP-28 (windowed, through-hole) |
| Operating Temperature | Industrial (per 'I' suffix) | 0C to +70C (commercial) |
| Programming | UV-erasable CMOS, JEDEC fuse file | β |
| Development Tool | Altera MAX+PLUS II (legacy) | β |
| RoHS Status | [DATA_NEEDED: RoHS compliance status for ceramic DIP variant] | [DATA_NEEDED: RoHS status] |
| Lead-Free | [DATA_NEEDED: lead-free status] | unknown |
| Device Type | β | UV-erasable EPLD (PAL-type CMOS) |
| Usable Gates | β | 600 |
| Propagation Delay (tPD) | β | 15 ns |
| Maximum Toggle Frequency (fMAX) | β | 83.3 MHz |
| Supply Voltage (VCC) | β | 5 V (nominal) |
| Logic Family | β | CMOS, TTL-compatible I/O |
| Programmable Pins | β | 16 bidirectional I/O + 4 dedicated input = 20 |
| Total Package Pins | β | 28 |
| Mounting Type | β | Through-Hole (DIP) |
| Erasure Method | β | UV light through ceramic quartz window |
| Process Technology | β | CMOS |