EPM5032DI-20 vs EPM5032DM Comparison
Detailed side-by-side comparison of EPM5032DI-20 by Intel and EPM5032DM by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EPM5032DI-20 | EPM5032DM |
|---|---|---|
| Brand | Intel | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $8.75 | $15.90 |
| Family | MAX 5000 (Altera legacy EPLD) | β |
| Architecture | CMOS PAL-type EPLD with PIA | β |
| Macrocells | 32 | 32 |
| Dedicated Inputs | 7 | β |
| Bidirectional I/O Pins | 16 | β |
| Product Terms | 320 (maximum) | β |
| Flip-Flops | 16 (one per macrocell) | β |
| Maximum Clock Frequency | 62.5 MHz | β |
| Pin-to-Pin Delay | 20 ns (speed grade -20) | β |
| Package | Ceramic DIP-20 (windowed, UV-erasable) | CDIP-28 (ceramic windowed DIP, 28-pin) |
| Operating Temperature | Industrial (per 'I' suffix) | -55C to +125C (military/extended, ceramic package) |
| Programming | UV-erasable CMOS, JEDEC fuse file | β |
| Development Tool | Altera MAX+PLUS II (legacy) | β |
| RoHS Status | [DATA_NEEDED: RoHS compliance status for ceramic DIP variant] | Non-compliant (ceramic DIP with UV window) |
| Lead-Free | [DATA_NEEDED: lead-free status] | No (ceramic DIP contains lead) |
| Device Family | β | MAX 5000 |
| Propagation Delay (tPD) | β | 25 ns |
| Usable Gates | β | 600 to 1000 (typical) |
| Logic Inputs | β | 32 |
| Process Technology | β | CMOS EEPROM |
| Supply Voltage (VCC) | β | 5 V (typical) |
| Standby Current | β | [DATA_NEEDED: ICC standby current] |
| Programming Technology | β | UV-erasable (windowed) EEPROM |
| Logic Function | β | Combinational and registered (synchronous) |
| Output Polarity | β | Programmable |
| Program Retention | β | Non-volatile (EEPROM) |
| Mounting Type | β | Through-hole (DIP) |