EPM5032DI25 vs EPM5032DC20 Comparison
Detailed side-by-side comparison of EPM5032DI25 by Altera and EPM5032DC20 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EPM5032DI25 | EPM5032DC20 |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $11.10 | $8.20 |
| Family | MAX 5000 | β |
| Device Type | UV-erasable EPLD (CMOS EPROM-based) | β |
| Macrocells | 32 | 32 |
| Logic Array Blocks (LABs) | 2 | β |
| Product Terms | 320 | β |
| Output Macrocells | 16 | 16 |
| Bidirectional I/O Pins | 16 | β |
| Dedicated Inputs | 7 | 7 |
| Total Inputs | 24 | β |
| Pin-to-Pin Delay (tPD) | 25 ns | β |
| Maximum Clock Frequency (fMAX) | 62.5 MHz | β |
| Supply Voltage (VCC) | 5 V (single supply) | 5 V (4.75 V to 5.25 V) |
| I/O Standard | TTL-compatible | β |
| Package | 24-pin Ceramic DIP (DI) with quartz window | 20-pin Ceramic DIP (DC) with UV window |
| Programming Technology | UV-EPROM (erasable via quartz window) | β |
| Device Family | β | MAX 5000 |
| Product Type | β | UV-erasable PLD (CPLD class) |
| Usable Gates | β | 600 |
| Propagation Delay (tPD) | β | 20 ns |
| Maximum Frequency (Fmax) | β | 71.4 MHz |
| I/O Pins | β | 16 (bidirectional) |
| Total Inputs (max) | β | 24 |
| Clock Inputs | β | 1 (global) |
| Architecture | β | PAL-type with Programmable Interconnect Array (PIA) |
| Process Technology | β | CMOS |
| Operating Temperature | β | [DATA_NEEDED: operating temperature range] |
| Mounting Type | β | Through-Hole (DIP) |
| RoHS Status | β | [DATA_NEEDED: RoHS compliance] |