EPM5032DM883B vs EPM5032DC20 Comparison
Detailed side-by-side comparison of EPM5032DM883B by Altera and EPM5032DC20 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EPM5032DM883B | EPM5032DC20 |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $64.50 | $8.20 |
| Family | MAX 5000 (Classic EPLD) | β |
| Macrocells | 32 | 32 |
| Logic Elements | 32 macrocells (MAX architecture) | β |
| Technology | UV-erasable EPROM cell | β |
| Propagation Delay (tPD) | [DATA_NEEDED: tPD in ns] | 20 ns |
| Maximum Counter Frequency (fCNT) | [DATA_NEEDED: fCNT in MHz] | β |
| Supply Voltage (VCC) | 5 V (nominal, TTL-compatible I/O) | 5 V (4.75 V to 5.25 V) |
| Operating Temperature | MILITARY (per /883B screen) | [DATA_NEEDED: operating temperature range] |
| MIL-STD-883 Screening | Class B (DM/883B) | β |
| Package Type | WDIP-28 (ceramic DIP with quartz window) | β |
| Pin Count | 28 | β |
| Mounting Type | Through-Hole | Through-Hole (DIP) |
| Terminal Form | Through-Hole | β |
| Package Shape | RECTANGULAR | β |
| Programming Method | Programmer + UV erase | β |
| RoHS Status | [DATA_NEEDED: lead-bearing ceramic; likely non-compliant] | [DATA_NEEDED: RoHS compliance] |
| Device Family | β | MAX 5000 |
| Product Type | β | UV-erasable PLD (CPLD class) |
| Usable Gates | β | 600 |
| Maximum Frequency (Fmax) | β | 71.4 MHz |
| Dedicated Inputs | β | 7 |
| I/O Pins | β | 16 (bidirectional) |
| Total Inputs (max) | β | 24 |
| Output Macrocells | β | 16 |
| Clock Inputs | β | 1 (global) |
| Architecture | β | PAL-type with Programmable Interconnect Array (PIA) |
| Process Technology | β | CMOS |
| Package | β | 20-pin Ceramic DIP (DC) with UV window |