EPM5032LC-15 vs EPM5032LC-20 Comparison

Detailed side-by-side comparison of EPM5032LC-15 by Altera and EPM5032LC-20 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPM5032LC-15 EPM5032LC-20
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $8.20 $8.40
Family MAX 5000 EPLD β€”
Architecture PAL-type AND/OR with PIA β€”
Usable Gates 600 600 gates
Macrocells 32 32
Logic Array Blocks (LABs) 4 β€”
Dedicated Inputs 7 7
Bidirectional I/O Pins 16 16
Maximum Operating Frequency 83.3 MHz β€”
Pin-to-Pin Delay (tPD) 15 ns β€”
Supply Voltage (VCC) 5 V (4.75 V to 5.25 V) 5 V Β±5%
Technology CMOS EPROM, 1.0 um process β€”
Programmability UV-Erasable / OTP β€”
Package JLCC-28 (windowed ceramic) LCC-28 (Plastic Leaded Chip Carrier, J-lead)
Operating Temperature 0C to +70C (commercial) 0 Β°C to +70 Β°C (commercial; -55 Β°C to +125 Β°C military per /883B variants)
RoHS Status Non-compliant (contains Pb, ceramic-windowed package) [DATA_NEEDED: RoHS status]
Device Family β€” MAX 5000
Product Type β€” EPLD / CPLD (One-Time Programmable / UV-Erasable)
Logic Blocks (LABs) β€” 1
Speed Grade β€” -20 (20 ns pin-to-pin)
Maximum Frequency β€” 71.4 MHz
Propagation Delay (tPD) β€” 20 ns
Total Inputs β€” 24
Output Functions β€” 16
Product Terms per Output β€” 16
Programmable Interconnect β€” Programmable Interconnect Array (PIA)
Mounting Type β€” Surface Mount
MSL Level β€” [DATA_NEEDED: MSL]

Datasheets & Resources

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