EPM5032LC-20 vs EPM5032LC-15 Comparison
Detailed side-by-side comparison of EPM5032LC-20 by Altera and EPM5032LC-15 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EPM5032LC-20 | EPM5032LC-15 |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $8.40 | $8.20 |
| Device Family | MAX 5000 | β |
| Product Type | EPLD / CPLD (One-Time Programmable / UV-Erasable) | β |
| Usable Gates | 600 gates | 600 |
| Macrocells | 32 | 32 |
| Logic Blocks (LABs) | 1 | β |
| Speed Grade | -20 (20 ns pin-to-pin) | β |
| Maximum Frequency | 71.4 MHz | β |
| Propagation Delay (tPD) | 20 ns | β |
| Supply Voltage (VCC) | 5 V Β±5% | 5 V (4.75 V to 5.25 V) |
| Operating Temperature | 0 Β°C to +70 Β°C (commercial; -55 Β°C to +125 Β°C military per /883B variants) | 0C to +70C (commercial) |
| Dedicated Inputs | 7 | 7 |
| Bidirectional I/O Pins | 16 | 16 |
| Total Inputs | 24 | β |
| Output Functions | 16 | β |
| Product Terms per Output | 16 | β |
| Programmable Interconnect | Programmable Interconnect Array (PIA) | β |
| Package | LCC-28 (Plastic Leaded Chip Carrier, J-lead) | JLCC-28 (windowed ceramic) |
| Mounting Type | Surface Mount | β |
| RoHS Status | [DATA_NEEDED: RoHS status] | Non-compliant (contains Pb, ceramic-windowed package) |
| MSL Level | [DATA_NEEDED: MSL] | β |
| Family | β | MAX 5000 EPLD |
| Architecture | β | PAL-type AND/OR with PIA |
| Logic Array Blocks (LABs) | β | 4 |
| Maximum Operating Frequency | β | 83.3 MHz |
| Pin-to-Pin Delay (tPD) | β | 15 ns |
| Technology | β | CMOS EPROM, 1.0 um process |
| Programmability | β | UV-Erasable / OTP |