EPM5032LC-20 vs EPM5032PC-20 Comparison

Detailed side-by-side comparison of EPM5032LC-20 by Altera and EPM5032PC-20 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPM5032LC-20 EPM5032PC-20
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $8.40 $7.05
Device Family MAX 5000 MAX 5000
Product Type EPLD / CPLD (One-Time Programmable / UV-Erasable) β€”
Usable Gates 600 gates 600
Macrocells 32 32
Logic Blocks (LABs) 1 β€”
Speed Grade -20 (20 ns pin-to-pin) β€”
Maximum Frequency 71.4 MHz β€”
Propagation Delay (tPD) 20 ns 20 ns
Supply Voltage (VCC) 5 V Β±5% 4.75 V to 5.25 V (nominal 5 V)
Operating Temperature 0 Β°C to +70 Β°C (commercial; -55 Β°C to +125 Β°C military per /883B variants) [DATA_NEEDED: operating temperature range]
Dedicated Inputs 7 24
Bidirectional I/O Pins 16 β€”
Total Inputs 24 β€”
Output Functions 16 β€”
Product Terms per Output 16 β€”
Programmable Interconnect Programmable Interconnect Array (PIA) β€”
Package LCC-28 (Plastic Leaded Chip Carrier, J-lead) PDIP-28 (Plastic DIP, 28-pin)
Mounting Type Surface Mount Through-Hole
RoHS Status [DATA_NEEDED: RoHS status] [DATA_NEEDED: RoHS status]
MSL Level [DATA_NEEDED: MSL] β€”
Device Type β€” CPLD (Complex Programmable Logic Device)
Programming Type β€” OTP (One-Time Programmable)
Logic Blocks β€” 2 Logic Array Blocks
Product Terms β€” 320
Bidirectional I/O Lines β€” 16
Maximum Clock Frequency β€” 62.5 MHz
Technology β€” CMOS, 0.65 um process
Architecture β€” PAL-type macrocells with Programmable Interconnect Array (PIA)

Datasheets & Resources

Browse All Products Create BOM Request Quote