EPM5032PC-20 vs EPM5032JC-20 Comparison
Detailed side-by-side comparison of EPM5032PC-20 by Altera and EPM5032JC-20 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EPM5032PC-20 | EPM5032JC-20 |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $7.05 | $9.75 |
| Device Family | MAX 5000 | β |
| Device Type | CPLD (Complex Programmable Logic Device) | β |
| Programming Type | OTP (One-Time Programmable) | β |
| Macrocells | 32 | 32 |
| Usable Gates | 600 | β |
| Logic Blocks | 2 Logic Array Blocks | β |
| Product Terms | 320 | β |
| Dedicated Inputs | 24 | 8 |
| Bidirectional I/O Lines | 16 | β |
| Propagation Delay (tPD) | 20 ns | 20 ns |
| Maximum Clock Frequency | 62.5 MHz | 62.5 MHz |
| Supply Voltage (VCC) | 4.75 V to 5.25 V (nominal 5 V) | β |
| Technology | CMOS, 0.65 um process | β |
| Architecture | PAL-type macrocells with Programmable Interconnect Array (PIA) | PAL-type AND-OR array with PIA interconnect |
| Package | PDIP-28 (Plastic DIP, 28-pin) | 68-pin JLCC (windowed ceramic) |
| Operating Temperature | [DATA_NEEDED: operating temperature range] | β |
| Mounting Type | Through-Hole | β |
| RoHS Status | [DATA_NEEDED: RoHS status] | β |
| Product Type | β | UV-erasable Programmable Logic Device (PLD) |
| Family | β | MAX 5000 |
| Logic Array Blocks (LABs) | β | 1 |
| Product Terms (P-terms) | β | 320 |
| Setup Time | β | 10 ns |
| I/O Lines | β | 16 (bidirectional) |
| Total Inputs | β | 24 |
| Process Technology | β | CMOS |
| Erase Method | β | UV (12V VPP + ultraviolet exposure) |
| Programming Voltage (VPP) | β | 12 V |
| Lifecycle Status | β | Obsolete (legacy Altera MAX 5000) |