EPM5064JC-2 vs EPM5064JC1 Comparison
Detailed side-by-side comparison of EPM5064JC-2 by Altera and EPM5064JC1 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EPM5064JC-2 | EPM5064JC1 |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $23.10 | $1.05 |
| Family | MAX 5000 | MAX 5000 |
| Macrocells | 64 | 64 |
| Logic Array Blocks (LABs) | 4 | 4 |
| Propagation Delay (tPD) | 45 ns | β |
| Maximum Clock Frequency (fMAX) | 50 MHz | β |
| Usable Gates | 1250 | 1.25K |
| Dedicated Inputs | 7 | 7 |
| I/O Pins | 28 | 28 |
| Interconnect | Programmable Interconnect Array (PIA) | β |
| Technology | CMOS, UV-erasable EPROM | β |
| Supply Voltage (VCC) | 5 V (4.75 V to 5.25 V) | β |
| Programming Method | UV-erase + EPROM programmer (not ISP) | β |
| Package | 28-pin CLCC (J-lead, ceramic, windowed) | 44-pin PLCC (J-Lead) |
| Operating Temperature | [DATA_NEEDED: commercial or industrial grade] | β |
| Compliance | RoHS status unknown (ceramic/J-lead windowed part, legacy product) | β |
| Device Type | β | CPLD / EPLD (Erasable PLD) |
| Maximum Operating Frequency (fCNT) | β | 62.5 MHz |
| External Clock Input (max) | β | 50 MHz |
| Total Inputs | β | 36 (28 I/O + 7 dedicated + 1 clock) |
| Operating Voltage (VCC) | β | 5 V |
| Program Type | β | EPROM (one-time programmable, UV-erasable) |
| Process Technology | β | CMOS |
| Operating Temperature (JC suffix) | β | 0Β°C to +70Β°C (commercial) |
| Supply Current (ICC) | β | [DATA_NEEDED: ICC maximum] |
| RoHS Status | β | unknown |
| Lead-Free Status | β | unknown |