EPM5064JC-2 vs EPM5064JI-1 Comparison
Detailed side-by-side comparison of EPM5064JC-2 by Altera and EPM5064JI-1 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EPM5064JC-2 | EPM5064JI-1 |
|---|---|---|
| Brand | Altera | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Nrnd |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $23.10 | $3.40 |
| Family | MAX 5000 | MAX 5000 |
| Macrocells | 64 | 64 |
| Logic Array Blocks (LABs) | 4 | β |
| Propagation Delay (tPD) | 45 ns | [DATA_NEEDED: combinational tPD from datasheet] |
| Maximum Clock Frequency (fMAX) | 50 MHz | β |
| Usable Gates | 1250 | β |
| Dedicated Inputs | 7 | β |
| I/O Pins | 28 | β |
| Interconnect | Programmable Interconnect Array (PIA) | β |
| Technology | CMOS, UV-erasable EPROM | β |
| Supply Voltage (VCC) | 5 V (4.75 V to 5.25 V) | β |
| Programming Method | UV-erase + EPROM programmer (not ISP) | β |
| Package | 28-pin CLCC (J-lead, ceramic, windowed) | 68-pin PLCC (windowed ceramic) |
| Operating Temperature | [DATA_NEEDED: commercial or industrial grade] | [DATA_NEEDED: commercial vs industrial grade temp range] |
| Compliance | RoHS status unknown (ceramic/J-lead windowed part, legacy product) | β |
| Device Type | β | EPLD (Erasable Programmable Logic Device) |
| User I/O Pins | β | [DATA_NEEDED: user I/O count from datasheet] |
| Logic Elements | β | [DATA_NEEDED: total logic elements] |
| Supply Voltage | β | 5 V |
| Process Technology | β | CMOS, UV-erasable |
| Speed Grade | β | JI-1 (commercial, -10/-12/-15 family) |
| Programmability | β | UV-erasable (windowed package) |
| Data Retention | β | 25 years (per MAX 5000 datasheet) |
| Mounting Type | β | Surface Mount |
| RoHS Status | β | [DATA_NEEDED: not stated in provided data] |