EPM5128GC-1 vs EPM5128JC-1 Comparison

Detailed side-by-side comparison of EPM5128GC-1 by Altera and EPM5128JC-1 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPM5128GC-1 EPM5128JC-1
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $18.95 $24.95
Family MAX 5000 MAX 5000
Device Type UV-erasable CMOS CPLD Erasable Programmable Logic Device (EPLD/CPLD)
Macrocells 128 128
Usable Gates 2,500 2,500
Dedicated Inputs 7 β€”
Maximum User I/O Pins 52 β€”
Nominal Supply Voltage 5 V β€”
Supply Voltage Range 4.75 V to 5.25 V β€”
Maximum Operating Frequency 62.5 MHz 62.5 MHz
Propagation Delay (tPD) 16 ns (typical, -1 speed grade) β€”
Package PGA-96+ (Pin Grid Array, ceramic windowed) 68-pin CQCCJ (Windowed Ceramic J-Lead Chip Carrier)
Technology CMOS, UV-erasable EPROM CMOS, UV-erasable EPROM
Operating Temperature -40C to +85C (industrial) [DATA_NEEDED: temperature grade]
IOL / IOH 100 mA / 25 mA per pin (legacy figure, [DATA_NEEDED: verify exact drive spec]) β€”
Security Bit Programmable, prevents readback β€”
Programming Method UV erase + EPROM program (or device programmer) β€”
MSL Level [DATA_NEEDED: MSL level] β€”
RoHS Status [DATA_NEEDED: RoHS compliance - ceramic PGA part is legacy] non_compliant (ceramic windowed package)
Logic Array Blocks (LABs) β€” [DATA_NEEDED: LAB count]
Pin-to-Pin Propagation Delay (tPD) β€” 40 ns
Supply Voltage (VCC) β€” 4.75 V to 5.25 V (5 V nominal)
Mounting Type β€” Surface Mount
Programming Interface β€” JTAG / Altera dedicated programmer
Configuration Memory β€” Non-volatile EPROM (UV-erasable)
Lifecycle Status β€” Obsolete - last-time-buy inventory only

Datasheets & Resources

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