EPM5128GC-2 vs EPM5128JC-1 Comparison

Detailed side-by-side comparison of EPM5128GC-2 by Altera and EPM5128JC-1 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPM5128GC-2 EPM5128JC-1
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $8.95 $24.95
Family MAX 5000 MAX 5000
Logic Elements / Gates 2,500 usable gates β€”
Macrocells 128 128
Number of Usable Gates 2,500 β€”
Maximum Operating Frequency 50 MHz 62.5 MHz
Propagation Delay (tPD) Approx. 25 ns (typical, -2 speed grade) β€”
Supply Voltage (VCC) 5 V (nominal) 4.75 V to 5.25 V (5 V nominal)
Package Type 68-pin PGA (Pin Grid Array) β€”
Package Code (per Partstack) WPGA β€”
Number of Terminals 68 β€”
Programming Technology UV-erasable EPROM β€”
Operating Temperature 0C to +70C (commercial) [DATA_NEEDED: temperature grade]
Grade (per Partstack) COMMERCIAL β€”
Terminal Form PIN/PEG β€”
Configuration Memory Non-volatile, one-time programmable (erasable via UV) Non-volatile EPROM (UV-erasable)
Device Type β€” Erasable Programmable Logic Device (EPLD/CPLD)
Usable Gates β€” 2,500
Logic Array Blocks (LABs) β€” [DATA_NEEDED: LAB count]
Pin-to-Pin Propagation Delay (tPD) β€” 40 ns
Technology β€” CMOS, UV-erasable EPROM
Package β€” 68-pin CQCCJ (Windowed Ceramic J-Lead Chip Carrier)
Mounting Type β€” Surface Mount
Programming Interface β€” JTAG / Altera dedicated programmer
RoHS Status β€” non_compliant (ceramic windowed package)
Lifecycle Status β€” Obsolete - last-time-buy inventory only

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