EPM5128GC vs EPM5064JC Comparison

Detailed side-by-side comparison of EPM5128GC by Altera and EPM5064JC by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPM5128GC EPM5064JC
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $19.20 $7.10
Family MAX 5000 MAX 5000
Macrocells 128 64
Usable Gates 2,500 1,250 (approx.)
Logic Elements / LABs [DATA_NEEDED: LAB count] β€”
User I/Os 68 β€”
Package Type WPGA (Windowed Ceramic Pin Grid Array) β€”
Package Code WPGA β€”
Number of Terminals 68 β€”
Terminal Form PIN/PEG (through-hole PGA with alignment pegs) β€”
Package Shape Square β€”
Temperature Grade Commercial β€”
Supply Voltage (Vcc) 5 V β€”
Process Technology CMOS, UV-erasable β€”
Architecture EPLD, programmable AND/OR array with fixed OR plane β€”
Propagation Delay (tpd) [DATA_NEEDED: tpd in ns] β€”
Maximum Frequency (fmax) [DATA_NEEDED: fmax in MHz] β€”
Programmable Security Bit Yes β€”
Configuration Memory Non-volatile UV-EPROM (windowed ceramic) EPROM (UV-erasable window or OTP)
Mounting Type Through-Hole (PGA socket required) Surface Mount (socketed)
RoHS Status [DATA_NEEDED: RoHS compliance] [DATA_NEEDED: RoHS compliance]
Device Type β€” EPLD (Erasable PLD)
Logic Array Inputs β€” 36
Logic Array Outputs β€” 64
Package β€” 68-pin PLCC (JEDEC)
Supply Voltage (VCC) β€” 5 V (typical, 4.75 V - 5.25 V range)
I/O Logic Level β€” TTL / CMOS compatible
Operating Temperature β€” [DATA_NEEDED: operating temperature grade]
Pin-to-Pin Delay (tPD) β€” [DATA_NEEDED: specific tPD grade value]
Maximum Frequency (fMAX) β€” [DATA_NEEDED: fCNT grade value]
Lead-Free β€” [DATA_NEEDED: lead-free status]
MSL Level β€” [DATA_NEEDED: MSL rating]
Programming Tool β€” Altera MAX+PLUS II / Quartus II (legacy device support)

Datasheets & Resources

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