EPM5128GC2 vs EPM5128GC-1 Comparison

Detailed side-by-side comparison of EPM5128GC2 by Altera and EPM5128GC-1 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPM5128GC2 EPM5128GC-1
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $54.00 $18.95
Family MAX 5000 MAX 5000
Device Type EPLD (Erasable Programmable Logic Device) UV-erasable CMOS CPLD
Macro Cells 128 β€”
Usable Gates 2.5K 2,500
Logic Array Blocks (LABs) 8 (16 macro cells each) β€”
Maximum Internal Frequency 50 MHz β€”
Supply Voltage VCC 5 V β€”
I/O Pins 64 β€”
Dedicated Inputs 16 7
Package Ceramic PGA (GC, windowed) PGA-96+ (Pin Grid Array, ceramic windowed)
Programmable Flip-Flop Modes D / T / JK / SR (selectable) β€”
Architecture AND/OR plane + programmable macro cell + PIA β€”
Process Technology CMOS EPROM β€”
Reprogrammability UV-erasable (windowed ceramic package) β€”
Operating Temperature [DATA_NEEDED: operating temperature range] -40C to +85C (industrial)
RoHS Status [DATA_NEEDED: RoHS status] [DATA_NEEDED: RoHS compliance - ceramic PGA part is legacy]
Configuration Memory On-chip EPROM (no external boot device) β€”
Pin Count [DATA_NEEDED: total PGA pin count] β€”
Macrocells β€” 128
Maximum User I/O Pins β€” 52
Nominal Supply Voltage β€” 5 V
Supply Voltage Range β€” 4.75 V to 5.25 V
Maximum Operating Frequency β€” 62.5 MHz
Propagation Delay (tPD) β€” 16 ns (typical, -1 speed grade)
Technology β€” CMOS, UV-erasable EPROM
IOL / IOH β€” 100 mA / 25 mA per pin (legacy figure, [DATA_NEEDED: verify exact drive spec])
Security Bit β€” Programmable, prevents readback
Programming Method β€” UV erase + EPROM program (or device programmer)
MSL Level β€” [DATA_NEEDED: MSL level]

Datasheets & Resources

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