EPM5128GM883B vs EPM5128JC Comparison
Detailed side-by-side comparison of EPM5128GM883B by Altera and EPM5128JC by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EPM5128GM883B | EPM5128JC |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Nrnd | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $159.25 | $9.75 |
| Family | MAX 5000 | β |
| Device Type | UV EPLD (Erasable Programmable Logic Device) | EPLD / CPLD |
| Macrocells | 128 | β |
| Logic Array Blocks (LABs) | 8 | β |
| User I/O Pins | 52 | [DATA_NEEDED: user I/O pin count] |
| Dedicated Inputs | 7 | 8 |
| Propagation Delay (tpd) | 55 ns | β |
| External Clock Inputs | 1 | β |
| Technology | CMOS | β |
| Configuration Memory | UV-erasable EPROM | UV-erasable EPROM (windowed package) |
| Interconnect | Programmable Interconnect Array (PIA) | β |
| Package | PGA-883 (ceramic pin grid array) | β |
| Operating Temperature | -55C to +125C (military) | Commercial 0C to +70C |
| Qualification | MIL-STD-883 Class B (suffix 883B) | β |
| Program/Erase Method | UV-erasable | β |
| Product Family | β | MAX 5000 |
| Macrocell Count | β | 128 |
| Propagation Delay (tPD) | β | 35 ns |
| Logic Elements | β | Programmable AND/OR/XOR array |
| Supply Voltage (VCC) | β | 5 V (typical) |
| Number of Pins | β | 68 |
| Package Type | β | PLCC-68 (JLCC) ceramic, J-leaded |
| Programming Interface | β | Altera MAX+PLUS II / A+PLUS / legacy programmer |
| Mounting Type | β | Surface Mount (PLCC socket or solder) |
| Boundary Scan | β | JTAG IEEE 1149.1 (family feature) |
| Process Technology | β | CMOS EPROM |
| RoHS Status | β | [DATA_NEEDED: RoHS status - legacy part] |
| Lead-Free | β | [DATA_NEEDED: lead-free status] |