EPM5128JC-1 vs EPM5128GC-1 Comparison

Detailed side-by-side comparison of EPM5128JC-1 by Altera and EPM5128GC-1 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPM5128JC-1 EPM5128GC-1
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $24.95 $18.95
Family MAX 5000 MAX 5000
Device Type Erasable Programmable Logic Device (EPLD/CPLD) UV-erasable CMOS CPLD
Macrocells 128 128
Usable Gates 2,500 2,500
Logic Array Blocks (LABs) [DATA_NEEDED: LAB count] β€”
Maximum Operating Frequency 62.5 MHz 62.5 MHz
Pin-to-Pin Propagation Delay (tPD) 40 ns β€”
Supply Voltage (VCC) 4.75 V to 5.25 V (5 V nominal) β€”
Technology CMOS, UV-erasable EPROM CMOS, UV-erasable EPROM
Package 68-pin CQCCJ (Windowed Ceramic J-Lead Chip Carrier) PGA-96+ (Pin Grid Array, ceramic windowed)
Mounting Type Surface Mount β€”
Operating Temperature [DATA_NEEDED: temperature grade] -40C to +85C (industrial)
Programming Interface JTAG / Altera dedicated programmer β€”
Configuration Memory Non-volatile EPROM (UV-erasable) β€”
RoHS Status non_compliant (ceramic windowed package) [DATA_NEEDED: RoHS compliance - ceramic PGA part is legacy]
Lifecycle Status Obsolete - last-time-buy inventory only β€”
Dedicated Inputs β€” 7
Maximum User I/O Pins β€” 52
Nominal Supply Voltage β€” 5 V
Supply Voltage Range β€” 4.75 V to 5.25 V
Propagation Delay (tPD) β€” 16 ns (typical, -1 speed grade)
IOL / IOH β€” 100 mA / 25 mA per pin (legacy figure, [DATA_NEEDED: verify exact drive spec])
Security Bit β€” Programmable, prevents readback
Programming Method β€” UV erase + EPROM program (or device programmer)
MSL Level β€” [DATA_NEEDED: MSL level]

Datasheets & Resources

Browse All Products Create BOM Request Quote