EPM5128JC vs EPM5128GC-1 Comparison
Detailed side-by-side comparison of EPM5128JC by Altera and EPM5128GC-1 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EPM5128GC-1
EPM5128GC-1 - 128-Macrocell CPLD, 62.5MHz, 5V MAX 5000 | Altera
EPM5128GC-1 ObsoleteSpecification Comparison
| Parameter | EPM5128JC | EPM5128GC-1 |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $9.75 | $18.95 |
| Product Family | MAX 5000 | β |
| Device Type | EPLD / CPLD | UV-erasable CMOS CPLD |
| Macrocell Count | 128 | β |
| Propagation Delay (tPD) | 35 ns | 16 ns (typical, -1 speed grade) |
| Logic Elements | Programmable AND/OR/XOR array | β |
| Supply Voltage (VCC) | 5 V (typical) | β |
| Number of Pins | 68 | β |
| Package Type | PLCC-68 (JLCC) ceramic, J-leaded | β |
| Dedicated Inputs | 8 | 7 |
| User I/O Pins | [DATA_NEEDED: user I/O pin count] | β |
| Configuration Memory | UV-erasable EPROM (windowed package) | β |
| Programming Interface | Altera MAX+PLUS II / A+PLUS / legacy programmer | β |
| Operating Temperature | Commercial 0C to +70C | -40C to +85C (industrial) |
| Mounting Type | Surface Mount (PLCC socket or solder) | β |
| Boundary Scan | JTAG IEEE 1149.1 (family feature) | β |
| Process Technology | CMOS EPROM | β |
| RoHS Status | [DATA_NEEDED: RoHS status - legacy part] | [DATA_NEEDED: RoHS compliance - ceramic PGA part is legacy] |
| Lead-Free | [DATA_NEEDED: lead-free status] | β |
| Family | β | MAX 5000 |
| Macrocells | β | 128 |
| Usable Gates | β | 2,500 |
| Maximum User I/O Pins | β | 52 |
| Nominal Supply Voltage | β | 5 V |
| Supply Voltage Range | β | 4.75 V to 5.25 V |
| Maximum Operating Frequency | β | 62.5 MHz |
| Package | β | PGA-96+ (Pin Grid Array, ceramic windowed) |
| Technology | β | CMOS, UV-erasable EPROM |
| IOL / IOH | β | 100 mA / 25 mA per pin (legacy figure, [DATA_NEEDED: verify exact drive spec]) |
| Security Bit | β | Programmable, prevents readback |
| Programming Method | β | UV erase + EPROM program (or device programmer) |
| MSL Level | β | [DATA_NEEDED: MSL level] |