EPM5128JI-2 vs EPM5130JI Comparison
Detailed side-by-side comparison of EPM5128JI-2 by Altera and EPM5130JI by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EPM5128JI-2 | EPM5130JI |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Nrnd | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $16.40 | $9.75 |
| Device Type | UV-Erasable Programmable Logic Device (PLD) | UV-Erasable EPLD (CMOS EPROM) |
| Series | MAX 5000 | β |
| Macrocells | 128 | 128 |
| Dedicated Inputs | 7 | β |
| User I/O Pins | 52 | β |
| Propagation Delay (tPD) | 45 ns | 55 ns |
| Maximum Clock Frequency | 50 MHz | 33.3 MHz |
| Supply Voltage (VCC) | 4.5 V to 5.5 V | β |
| Operating Temperature | -40 C to +85 C (industrial) | Commercial (0C to +70C) |
| Package Type | Ceramic J-Lead (JI) with UV window | Ceramic J-Leaded Chip Carrier (JLCC) with UV window |
| Process Technology | CMOS EPROM | 0.75 micron CMOS EPROM |
| Programmability | UV-erase, parallel programmer | β |
| Architecture | LAB-based macrocell, segmented interconnect | β |
| Speed Grade | -2 (industrial-speed) | β |
| RoHS Status | unknown | Non-compliant (contains Pb in ceramic package) |
| Lead-Free | unknown | β |
| Family | β | MAX 5000 |
| Logic Array Blocks (LABs) | β | 8 |
| External Clock Inputs | β | 1 (shared input/clock) |
| Interconnect | β | Programmable Interconnect Array (PIA) |
| Supply Voltage | β | 5 V (typical) |
| Input Logic Standard | β | TTL-compatible |
| Program/Erase Method | β | UV erasure through quartz window |
| Lifecycle | β | Obsolete - EOL by Altera/Intel |