EPM5128LC-1 vs EPM5128JC-2 Comparison
Detailed side-by-side comparison of EPM5128LC-1 by Altera and EPM5128JC-2 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EPM5128LC-1
EPM5128LC-1 - 128-Macrocell MAX 5000 CPLD | Altera | 5V 68-Pin PLCC
EPM5128LC-1 ObsoleteSpecification Comparison
| Parameter | EPM5128LC-1 | EPM5128JC-2 |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $8.20 | $21.75 |
| Family | MAX 5000 | MAX 5000 |
| Logic Elements / Macrocells | 128 macrocells | β |
| Number of Usable Gates | [DATA_NEEDED: usable gates] | β |
| Dedicated Inputs | 7 | 7 |
| Bidirectional I/O Pins | 52 | β |
| Total User I/O | 60 (max) | β |
| Propagation Delay (tpd) | 30 ns | β |
| Supply Voltage (VCC) | 5 V (Β±10%) | β |
| Process Technology | CMOS EPROM, UV-erasable | CMOS |
| Programmability | UV-erasable / OTP (windowed package) | β |
| Package Type | 68-pin J-lead ceramic chip carrier (PLCC windowed) | β |
| Operating Temperature | 0C to +70C (commercial) | [DATA_NEEDED: operating temperature range] |
| JTAG Support | IEEE 1149.1 boundary-scan | β |
| Mounting Type | Surface Mount (J-lead PLCC socket compatible) | Surface Mount |
| RoHS Status | [DATA_NEEDED: RoHS status] | Non-compliant (ceramic windowed package contains lead-bearing solder) |
| Lead-Free | [DATA_NEEDED: lead-free status] | β |
| Device Type | β | UV-Erasable Programmable Logic Device (PLD) |
| Macrocells | β | 128 |
| Propagation Delay (tPD) | β | 45 ns (max) |
| Maximum Counter Frequency (fCNT) | β | 50 MHz |
| Input Setup Time (tSU) | β | 7.5 ns |
| Output Drive Current (IOH/IOL) | β | 12 mA DC |
| Package | β | 68-pin CQCC (Ceramic Quad Flat Pack), windowed |
| Supply Voltage | β | 5 V (nominal) |
| Program/Erase Method | β | UV (ceramic window) |
| Erase/Program Cycles | β | [DATA_NEEDED: minimum erase/program cycles] |
| Logic Family | β | TTL-compatible I/O |