EPM5128LC-1 vs EPM5192-1LC Comparison

Detailed side-by-side comparison of EPM5128LC-1 by Altera and EPM5192-1LC by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Altera
EPM5192-1LC

EPM5192-1LC - MAX 5000 CPLD 192-Macrocell 62.5MHz | Altera

EPM5192-1LC Obsolete

Specification Comparison

Parameter EPM5128LC-1 EPM5192-1LC
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $8.20 $19.40
Family MAX 5000 MAX 5000
Logic Elements / Macrocells 128 macrocells β€”
Number of Usable Gates [DATA_NEEDED: usable gates] β€”
Dedicated Inputs 7 β€”
Bidirectional I/O Pins 52 β€”
Total User I/O 60 (max) β€”
Propagation Delay (tpd) 30 ns [DATA_NEEDED: -1 speed grade tpd in ns]
Supply Voltage (VCC) 5 V (Β±10%) β€”
Process Technology CMOS EPROM, UV-erasable UV EPROM, erasable windowless
Programmability UV-erasable / OTP (windowed package) β€”
Package Type 68-pin J-lead ceramic chip carrier (PLCC windowed) β€”
Operating Temperature 0C to +70C (commercial) 0C to +70C (commercial)
JTAG Support IEEE 1149.1 boundary-scan β€”
Mounting Type Surface Mount (J-lead PLCC socket compatible) Surface Mount
RoHS Status [DATA_NEEDED: RoHS status] Non-compliant (ceramic windowless package, lead-bearing termination)
Lead-Free [DATA_NEEDED: lead-free status] β€”
Device Type β€” CPLD (Complex Programmable Logic Device)
Usable Gates β€” 3,750
Macrocells β€” 192
Logic Array Blocks (LABs) β€” 4
User I/O Pins β€” 64
Maximum Operating Frequency β€” 62.5 MHz
Supply Voltage β€” 5 V
Programmable Interconnect β€” PIA (Programmable Interconnect Array)
JTAG Boundary Scan β€” IEEE 1149.1 compliant
Package β€” 64-pin Ceramic J-Lead Chip Carrier (LC)

Datasheets & Resources

Browse All Products Create BOM Request Quote