EPM5128LC2 vs EPM5128LC-1 Comparison

Detailed side-by-side comparison of EPM5128LC2 by Altera and EPM5128LC-1 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Altera
EPM5128LC2

EPM5128LC2 - 128-Macrocell MAX 5000 CPLD, 45ns, 5V | Altera

EPM5128LC2 ⚠ Last Time Buy

Specification Comparison

Parameter EPM5128LC2 EPM5128LC-1
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Last_time_buy Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $22.40 $8.20
Family MAX 5000 MAX 5000
Device Type CPLD (Complex Programmable Logic Device) β€”
Macrocells 128 β€”
Logic Array Blocks (LABs) 8 β€”
Interconnect Programmable Interconnect Array (PIA) β€”
Global Clock Inputs 1 dedicated β€”
Propagation Delay (tPD) 45 ns β€”
Supply Voltage (VCC) 5 V 5 V (Β±10%)
Process Technology CMOS EPROM CMOS EPROM, UV-erasable
Configuration Memory On-chip EPROM (non-volatile) β€”
Boundary Scan JTAG / IEEE 1149.1 β€”
Operating Temperature -40 C to +85 C (extended commercial) 0C to +70C (commercial)
Package PGA (Pin Grid Array, ceramic) β€”
Mounting Type Through-Hole / Socketed Surface Mount (J-lead PLCC socket compatible)
RoHS Status [DATA_NEEDED: RoHS status] [DATA_NEEDED: RoHS status]
Logic Elements / Macrocells β€” 128 macrocells
Number of Usable Gates β€” [DATA_NEEDED: usable gates]
Dedicated Inputs β€” 7
Bidirectional I/O Pins β€” 52
Total User I/O β€” 60 (max)
Propagation Delay (tpd) β€” 30 ns
Programmability β€” UV-erasable / OTP (windowed package)
Package Type β€” 68-pin J-lead ceramic chip carrier (PLCC windowed)
JTAG Support β€” IEEE 1149.1 boundary-scan
Lead-Free β€” [DATA_NEEDED: lead-free status]

Datasheets & Resources

Browse All Products Create BOM Request Quote