EPM5128LC2 vs EPM5192-1LC Comparison
Detailed side-by-side comparison of EPM5128LC2 by Altera and EPM5192-1LC by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EPM5128LC2 | EPM5192-1LC |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Last_time_buy | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $22.40 | $19.40 |
| Family | MAX 5000 | MAX 5000 |
| Device Type | CPLD (Complex Programmable Logic Device) | CPLD (Complex Programmable Logic Device) |
| Macrocells | 128 | 192 |
| Logic Array Blocks (LABs) | 8 | 4 |
| Interconnect | Programmable Interconnect Array (PIA) | β |
| Global Clock Inputs | 1 dedicated | β |
| Propagation Delay (tPD) | 45 ns | β |
| Supply Voltage (VCC) | 5 V | β |
| Process Technology | CMOS EPROM | UV EPROM, erasable windowless |
| Configuration Memory | On-chip EPROM (non-volatile) | β |
| Boundary Scan | JTAG / IEEE 1149.1 | β |
| Operating Temperature | -40 C to +85 C (extended commercial) | 0C to +70C (commercial) |
| Package | PGA (Pin Grid Array, ceramic) | 64-pin Ceramic J-Lead Chip Carrier (LC) |
| Mounting Type | Through-Hole / Socketed | Surface Mount |
| RoHS Status | [DATA_NEEDED: RoHS status] | Non-compliant (ceramic windowless package, lead-bearing termination) |
| Usable Gates | β | 3,750 |
| User I/O Pins | β | 64 |
| Maximum Operating Frequency | β | 62.5 MHz |
| Propagation Delay (tpd) | β | [DATA_NEEDED: -1 speed grade tpd in ns] |
| Supply Voltage | β | 5 V |
| Programmable Interconnect | β | PIA (Programmable Interconnect Array) |
| JTAG Boundary Scan | β | IEEE 1149.1 compliant |