EPM5130JI vs EPM5128JI-2 Comparison
Detailed side-by-side comparison of EPM5130JI by Altera and EPM5128JI-2 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EPM5130JI | EPM5128JI-2 |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Nrnd |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $9.75 | $16.40 |
| Family | MAX 5000 | β |
| Device Type | UV-Erasable EPLD (CMOS EPROM) | UV-Erasable Programmable Logic Device (PLD) |
| Macrocells | 128 | 128 |
| Logic Array Blocks (LABs) | 8 | β |
| Maximum Clock Frequency | 33.3 MHz | 50 MHz |
| Propagation Delay (tPD) | 55 ns | 45 ns |
| External Clock Inputs | 1 (shared input/clock) | β |
| Interconnect | Programmable Interconnect Array (PIA) | β |
| Process Technology | 0.75 micron CMOS EPROM | CMOS EPROM |
| Supply Voltage | 5 V (typical) | β |
| Input Logic Standard | TTL-compatible | β |
| Package Type | Ceramic J-Leaded Chip Carrier (JLCC) with UV window | Ceramic J-Lead (JI) with UV window |
| Operating Temperature | Commercial (0C to +70C) | -40 C to +85 C (industrial) |
| Program/Erase Method | UV erasure through quartz window | β |
| RoHS Status | Non-compliant (contains Pb in ceramic package) | unknown |
| Lifecycle | Obsolete - EOL by Altera/Intel | β |
| Series | β | MAX 5000 |
| Dedicated Inputs | β | 7 |
| User I/O Pins | β | 52 |
| Supply Voltage (VCC) | β | 4.5 V to 5.5 V |
| Programmability | β | UV-erase, parallel programmer |
| Architecture | β | LAB-based macrocell, segmented interconnect |
| Speed Grade | β | -2 (industrial-speed) |
| Lead-Free | β | unknown |