EPM5130QC-1 vs EPM5130LC Comparison
Detailed side-by-side comparison of EPM5130QC-1 by Altera and EPM5130LC by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EPM5130QC-1 | EPM5130LC |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $9.95 | $15.60 |
| Family | MAX 5000 | MAX 5000 (EPM51xx) |
| Product Type | UV-Erasable / OTP Complex PLD (CPLD) | β |
| Logic Cells / Macrocells | 128 macrocells | β |
| Usable Gates (marketing) | 5130 gates | β |
| Speed Grade | -1 | β |
| Package | PQFP-100 (windowed ceramic) | JLCC-68 (J-Lead Ceramic Chip Carrier) |
| Terminal Pitch | 0.635 mm | β |
| Process Technology | CMOS | CMOS (0.7 um EPROM) |
| Configuration Memory | UV-Erasable EPROM | β |
| Supply Voltage | 5 V (single) | β |
| Operating Temperature | Commercial (0 C to +70 C) | [DATA_NEEDED: commercial/industrial/military grade] |
| Programmable Polarity | Yes (per macrocell) | β |
| Boundary Scan / JTAG | Per MAX 5000 family | β |
| Mounting Type | Surface Mount | Surface Mount |
| RoHS Status | [DATA_NEEDED: rohs status] | Non-compliant (ceramic JLCC, contains lead) |
| Series | β | MAX 5000 |
| Macrocells | β | 128 |
| Logic Array Blocks (LABs) | β | 8 |
| User I/O Pins | β | 48 |
| Total Inputs (Dedicated + I/O) | β | 68 |
| Dedicated Inputs | β | 19 |
| Propagation Delay (tPD) | β | 55 ns |
| Maximum Internal Clock Frequency | β | 50 MHz |
| Global Clock Inputs | β | 1 |
| Configuration Technology | β | UV-Erasable / OTP EPROM |
| Supply Voltage (VCC) | β | 4.5 V to 5.5 V |
| I/O Standard | β | TTL-compatible |