EPM5130WC-1 vs EPM5130JI Comparison

Detailed side-by-side comparison of EPM5130WC-1 by Intel and EPM5130JI by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPM5130WC-1 EPM5130JI
Brand Intel Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $85.00 $9.75
Series MAX 5000 β€”
Manufacturer Altera (now Intel) β€”
Device Type CPLD (Complex Programmable Logic Device) UV-Erasable EPLD (CMOS EPROM)
Macrocell Count 128 β€”
Logic Array Blocks Multiple LABs (per MAX 5000 architecture) β€”
Propagation Delay (tpd) 40 ns β€”
Maximum Clock Frequency 50 MHz 33.3 MHz
Erasure Method UV (ultraviolet, windowed package) β€”
Process Technology CMOS EPROM 0.75 micron CMOS EPROM
User I/O Pins Up to 100 β€”
Package Type 100-pin Ceramic QFP (Windowed) Ceramic J-Leaded Chip Carrier (JLCC) with UV window
Operating Temperature [DATA_NEEDED: operating temperature range] Commercial (0C to +70C)
Supply Voltage [DATA_NEEDED: VCC nominal] 5 V (typical)
Programmable Yes (UV-erasable, non-volatile) β€”
Logic Family MAX 5000 (Altera) β€”
Configuration Memory EPROM (on-chip) β€”
Mounting Type Surface Mount β€”
RoHS Status [DATA_NEEDED: RoHS compliance] Non-compliant (contains Pb in ceramic package)
Family β€” MAX 5000
Macrocells β€” 128
Logic Array Blocks (LABs) β€” 8
Propagation Delay (tPD) β€” 55 ns
External Clock Inputs β€” 1 (shared input/clock)
Interconnect β€” Programmable Interconnect Array (PIA)
Input Logic Standard β€” TTL-compatible
Program/Erase Method β€” UV erasure through quartz window
Lifecycle β€” Obsolete - EOL by Altera/Intel

Datasheets & Resources

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