EPM5192-1LC vs EPM5128LC2 Comparison
Detailed side-by-side comparison of EPM5192-1LC by Altera and EPM5128LC2 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EPM5192-1LC | EPM5128LC2 |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Last_time_buy |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $19.40 | $22.40 |
| Family | MAX 5000 | MAX 5000 |
| Device Type | CPLD (Complex Programmable Logic Device) | CPLD (Complex Programmable Logic Device) |
| Usable Gates | 3,750 | β |
| Macrocells | 192 | 128 |
| Logic Array Blocks (LABs) | 4 | 8 |
| User I/O Pins | 64 | β |
| Maximum Operating Frequency | 62.5 MHz | β |
| Propagation Delay (tpd) | [DATA_NEEDED: -1 speed grade tpd in ns] | β |
| Supply Voltage | 5 V | β |
| Process Technology | UV EPROM, erasable windowless | CMOS EPROM |
| Programmable Interconnect | PIA (Programmable Interconnect Array) | β |
| JTAG Boundary Scan | IEEE 1149.1 compliant | β |
| Package | 64-pin Ceramic J-Lead Chip Carrier (LC) | PGA (Pin Grid Array, ceramic) |
| Mounting Type | Surface Mount | Through-Hole / Socketed |
| Operating Temperature | 0C to +70C (commercial) | -40 C to +85 C (extended commercial) |
| RoHS Status | Non-compliant (ceramic windowless package, lead-bearing termination) | [DATA_NEEDED: RoHS status] |
| Interconnect | β | Programmable Interconnect Array (PIA) |
| Global Clock Inputs | β | 1 dedicated |
| Propagation Delay (tPD) | β | 45 ns |
| Supply Voltage (VCC) | β | 5 V |
| Configuration Memory | β | On-chip EPROM (non-volatile) |
| Boundary Scan | β | JTAG / IEEE 1149.1 |