EPM51929C vs EPM5192-1LC Comparison

Detailed side-by-side comparison of EPM51929C by Intel and EPM5192-1LC by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPM51929C EPM5192-1LC
Brand Intel Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $9.40 $19.40
Device Family MAX 5000 β€”
Device Type EPLD (Erasable Programmable Logic Device) CPLD (Complex Programmable Logic Device)
Architecture Multi-array matrix (PAL-based macrocells) β€”
Logic Density [DATA_NEEDED: usable gates] β€”
Number of Macrocells [DATA_NEEDED: macrocell count] β€”
Number of Pins [DATA_NEEDED: pin count] β€”
Package Type [DATA_NEEDED: package suffix - C denotes commercial temperature grade] β€”
Technology CMOS EPROM β€”
Programmability UV-erasable, JEDEC fuse map β€”
Operating Temperature Commercial (0C to +70C) 0C to +70C (commercial)
Supply Voltage [DATA_NEEDED: VCC range] 5 V
Propagation Delay [DATA_NEEDED: tpd specification] β€”
Maximum Toggle Frequency [DATA_NEEDED: fmax] β€”
Mounting Type Surface Mount or Through-Hole (package dependent) Surface Mount
RoHS Status unknown Non-compliant (ceramic windowless package, lead-bearing termination)
Lead-Free unknown β€”
MSL Level [DATA_NEEDED] β€”
Family β€” MAX 5000
Usable Gates β€” 3,750
Macrocells β€” 192
Logic Array Blocks (LABs) β€” 4
User I/O Pins β€” 64
Maximum Operating Frequency β€” 62.5 MHz
Propagation Delay (tpd) β€” [DATA_NEEDED: -1 speed grade tpd in ns]
Process Technology β€” UV EPROM, erasable windowless
Programmable Interconnect β€” PIA (Programmable Interconnect Array)
JTAG Boundary Scan β€” IEEE 1149.1 compliant
Package β€” 64-pin Ceramic J-Lead Chip Carrier (LC)

Datasheets & Resources

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