EPM51929C vs EPM5192AGC-15 Comparison

Detailed side-by-side comparison of EPM51929C by Intel and EPM5192AGC-15 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPM51929C EPM5192AGC-15
Brand Intel Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $9.40 $27.80
Device Family MAX 5000 β€”
Device Type EPLD (Erasable Programmable Logic Device) β€”
Architecture Multi-array matrix (PAL-based macrocells) β€”
Logic Density [DATA_NEEDED: usable gates] β€”
Number of Macrocells [DATA_NEEDED: macrocell count] β€”
Number of Pins [DATA_NEEDED: pin count] β€”
Package Type [DATA_NEEDED: package suffix - C denotes commercial temperature grade] β€”
Technology CMOS EPROM CMOS, UV-erasable EPROM
Programmability UV-erasable, JEDEC fuse map β€”
Operating Temperature Commercial (0C to +70C) [DATA_NEEDED: operating temperature range]
Supply Voltage [DATA_NEEDED: VCC range] β€”
Propagation Delay [DATA_NEEDED: tpd specification] β€”
Maximum Toggle Frequency [DATA_NEEDED: fmax] β€”
Mounting Type Surface Mount or Through-Hole (package dependent) β€”
RoHS Status unknown [DATA_NEEDED: RoHS status - legacy ceramic PGA typically non-compliant]
Lead-Free unknown β€”
MSL Level [DATA_NEEDED] β€”
Product Type β€” EPLD (Erasable Programmable Logic Device)
Series β€” MAX 5000
Macrocells β€” 192
Logic Array Blocks β€” 16 (typical for 192-macrocell MAX 5000)
Maximum User I/O Pins β€” 64
Dedicated Inputs β€” 7
Total Inputs β€” 72
Propagation Delay (tPD) β€” 15 ns (pin-to-pin, -15 speed grade)
Supply Voltage (VCC) β€” 5 V
Package β€” Ceramic Pin Grid Array (PGA)
Programming Method β€” UV erase + EPROM program (via Altera programmer)
Lifecycle Status β€” Obsolete / Last Time Buy (per Altera legacy product list)

Datasheets & Resources

Browse All Products Create BOM Request Quote