EPM5192AGC-20 vs EPM5192AGC-15 Comparison

Detailed side-by-side comparison of EPM5192AGC-20 by Intel and EPM5192AGC-15 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPM5192AGC-20 EPM5192AGC-15
Brand Intel Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $9.95 $27.80
Family MAX 5000 β€”
Device Type EPLD (EEPLD, UV-erasable) β€”
Macrocells 192 192
Usable Gates 12,000 β€”
Propagation Delay (tPD) 20 ns 15 ns (pin-to-pin, -15 speed grade)
Counter Frequency (fCNT) 100 MHz (max) β€”
Supply Voltage (VCC) 5 V (4.75 V to 5.25 V) 5 V
Logic Array Blocks (LABs) 8 β€”
Dedicated I/O Pins 96 β€”
Programming Interface IEEE 1149.1 JTAG β€”
In-System Programmability Yes (5 V ISP) β€”
Security Bit Yes (pattern read-back protected) β€”
Package PGA-132 (ceramic windowed, 'GC') Ceramic Pin Grid Array (PGA)
Mounting Type Through-hole (PGA socket) β€”
Operating Temperature 0C to 70C (commercial) [DATA_NEEDED: operating temperature range]
RoHS Status [DATA_NEEDED: RoHS status - ceramic PGA windowed parts are typically pre-RoHS] [DATA_NEEDED: RoHS status - legacy ceramic PGA typically non-compliant]
Product Type β€” EPLD (Erasable Programmable Logic Device)
Series β€” MAX 5000
Logic Array Blocks β€” 16 (typical for 192-macrocell MAX 5000)
Maximum User I/O Pins β€” 64
Dedicated Inputs β€” 7
Total Inputs β€” 72
Technology β€” CMOS, UV-erasable EPROM
Programming Method β€” UV erase + EPROM program (via Altera programmer)
Lifecycle Status β€” Obsolete / Last Time Buy (per Altera legacy product list)

Datasheets & Resources

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