EPM5192AJI84-15 vs EPM5192AGC84-20 Comparison

Detailed side-by-side comparison of EPM5192AJI84-15 by Altera and EPM5192AGC84-20 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPM5192AJI84-15 EPM5192AGC84-20
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $27.80 $41.20
Device Family MAX 5000 EPLD β€”
Product Type UV-Erasable / OTP Complex PLD Complex Programmable Logic Device (CPLD)
Macrocells 192 192
Logic Array Blocks (LABs) 16 β€”
User I/O Pins 84 64
Propagation Delay (tPD) 15 ns β€”
Supply Voltage (VCC) 4.5 V to 5.5 V (nominal 5 V) β€”
Process Technology CMOS EPROM (UV-erasable) CMOS
Package Type 84-pin JLCC (J-Leaded Ceramic Chip Carrier) with quartz window β€”
Mounting Type Through-Hole (SMD socket-compatible) Through-Hole (Pin Grid Array socket)
Operating Temperature -40 Β°C to +85 Β°C (Industrial, 'I' suffix) β€”
Programming Method UV erase + EPROM program via standard Altera programmer β€”
Design Tool Support MAX+PLUS II (legacy); not supported by modern Quartus Prime β€”
RoHS Status unknown [DATA_NEEDED: RoHS compliance]
Lead-Free unknown β€”
Halogen-Free unknown β€”
Functional Equivalent (Plastic OTP) EPM5192AJC84-15 (windowless plastic JLCC, same die) β€”
Family β€” MAX 5000
Dedicated Inputs β€” 7
Logic Gates (typical) β€” [DATA_NEEDED: typical gate count]
Maximum Clock Frequency (fMAX) β€” 66.7 MHz
Pin-to-Pin Delay (tPD) β€” 20 ns
Speed Grade β€” -20
Package β€” 84-pin Ceramic Pin Grid Array (CPGA, WPGA)
Package Code β€” WPGA
Erasure Method β€” UV-Erasable (with OTP window)
Operating Temperature Grade β€” Commercial
Supply Voltage β€” [DATA_NEEDED: VCC range]
I/O Standard β€” 5V CMOS / TTL compatible

Datasheets & Resources

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