EPM5192AJI84-20 vs EPM5192AJC84-15 Comparison

Detailed side-by-side comparison of EPM5192AJI84-20 by Altera and EPM5192AJC84-15 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPM5192AJI84-20 EPM5192AJC84-15
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $10.95 $18.95
Device Family MAX 5000 (EPM5192) β€”
Logic Cells / Macrocells 192 macrocells β€”
Device Type UV-Erasable / OTP Complex PLD EPLD (Erasable Programmable Logic Device)
Propagation Delay (tPD) 33 ns β€”
Maximum Frequency (fCNT) 66.7 MHz β€”
Supply Voltage (VCC) 5 V nominal (4.5 V to 5.5 V) 5 V (single supply)
Process Technology CMOS CMOS EPROM
Operating Temperature Grade Industrial β€”
Package Code WQCCJ (JEDEC) β€”
Package Type 84-pin J-bend Ceramic Chip Carrier (PLCC-84, JI) β€”
Mounting Type Surface Mount Surface Mount
Terminal Form J-Bend β€”
Number of Terminals 84 β€”
Programmability UV-erasable window + OTP β€”
Pin Count 84 β€”
Lifecycle Status Obsolete (legacy Altera MAX 5000) β€”
RoHS Status [DATA_NEEDED: RoHS status of EPM5192AJI84-20] Non-compliant (contains Pb, ceramic windowed package)
Family β€” MAX 5000
Macrocells β€” 192
Propagation Delay (tpd) β€” 15 ns
Maximum Clock Frequency (fMAX) β€” 83.3 MHz
Technology β€” CMOS, UV-erasable EPROM
Package β€” 84-pin PLCC (J84C) windowed ceramic
Operating Temperature β€” [DATA_NEEDED: commercial/industrial/military grade]
Programming Method β€” UV-erase + EPROM programming (windowed package)
Logic Blocks β€” 16 Logic Array Blocks (LABs)
I/O Pins β€” [DATA_NEEDED: user I/O count]

Datasheets & Resources

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