EPM5192ALC84-15 vs EPM5192AGC84-20 Comparison
Detailed side-by-side comparison of EPM5192ALC84-15 by Altera and EPM5192AGC84-20 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EPM5192ALC84-15 | EPM5192AGC84-20 |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $13.20 | $41.20 |
| Device Family | MAX 5000 (EPM5192) | β |
| Device Type | CPLD / UV-Erasable / OTP Complex PLD | β |
| Macrocells | 192 | 192 |
| Dedicated Inputs | 7 | 7 |
| User I/O Pins | 64 | 64 |
| Propagation Delay (tPD) | 15 ns | β |
| Propagation Delay (Industry Variant) | 25 ns (per MicrochipUSA listing) | β |
| Supply Voltage (VCC) | 4.75 V to 5.25 V (nominal 5 V) | β |
| Process Technology | CMOS (EPROM-based) | CMOS |
| Programmability | UV-erasable window / OTP | β |
| Package | 84-pin PLCC (QCCJ, J-bend ceramic) | 84-pin Ceramic Pin Grid Array (CPGA, WPGA) |
| Operating Temperature Grade | Commercial | Commercial |
| Terminal Form | J-BEND | β |
| Package Code | QCCJ | WPGA |
| Package Shape | SQUARE | β |
| Architecture | Programmable Logic Array + Macrocell Registers + PIA interconnect | β |
| Product Type | β | Complex Programmable Logic Device (CPLD) |
| Family | β | MAX 5000 |
| Logic Gates (typical) | β | [DATA_NEEDED: typical gate count] |
| Maximum Clock Frequency (fMAX) | β | 66.7 MHz |
| Pin-to-Pin Delay (tPD) | β | 20 ns |
| Speed Grade | β | -20 |
| Erasure Method | β | UV-Erasable (with OTP window) |
| Supply Voltage | β | [DATA_NEEDED: VCC range] |
| I/O Standard | β | 5V CMOS / TTL compatible |
| RoHS Status | β | [DATA_NEEDED: RoHS compliance] |
| Mounting Type | β | Through-Hole (Pin Grid Array socket) |