EPM5192ALC84-15 vs EPM5192ALI84-20 Comparison

Detailed side-by-side comparison of EPM5192ALC84-15 by Altera and EPM5192ALI84-20 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPM5192ALC84-15 EPM5192ALI84-20
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $13.20 $9.90
Device Family MAX 5000 (EPM5192) β€”
Device Type CPLD / UV-Erasable / OTP Complex PLD EPLD (UV-erasable / OTP Complex PLD)
Macrocells 192 192
Dedicated Inputs 7 β€”
User I/O Pins 64 β€”
Propagation Delay (tPD) 15 ns 20 ns (pin-compatible speed grade)
Propagation Delay (Industry Variant) 25 ns (per MicrochipUSA listing) β€”
Supply Voltage (VCC) 4.75 V to 5.25 V (nominal 5 V) β€”
Process Technology CMOS (EPROM-based) CMOS, EPROM-based
Programmability UV-erasable window / OTP UV-erasable / one-time programmable (OTP)
Package 84-pin PLCC (QCCJ, J-bend ceramic) β€”
Operating Temperature Grade Commercial Industrial (I)
Terminal Form J-BEND β€”
Package Code QCCJ QCCJ (Plastic Leaded Chip Carrier, J-bend)
Package Shape SQUARE β€”
Architecture Programmable Logic Array + Macrocell Registers + PIA interconnect β€”
Family β€” MAX 5000
User I/O Pins (max) β€” 84 (in PLCC-84 package)
Supply Voltage β€” 5 V (single supply, TTL-compatible I/O)
Package Type β€” PLCC-84 (PQCC-84)
No. of Terminals β€” 84
Form of Terminal β€” J-BEND
Mounting Type β€” Surface Mount (PLCC socket compatible)
Logic Type β€” Combinatorial and registered, per-macrocell DFF
I/O Standard β€” TTL-compatible
RoHS Status β€” [DATA_NEEDED: RoHS status - Altera MAX 5000 series is generally legacy and may not be RoHS compliant]

Datasheets & Resources

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