EPM5192ALI84-20 vs EPM5192ALC84-15 Comparison
Detailed side-by-side comparison of EPM5192ALI84-20 by Altera and EPM5192ALC84-15 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EPM5192ALI84-20 - 192-Macrocell MAX 5000 PLD, 84-Pin J-Lead | Altera
EPM5192ALI84-20 ObsoleteSpecification Comparison
| Parameter | EPM5192ALI84-20 | EPM5192ALC84-15 |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $9.90 | $13.20 |
| Family | MAX 5000 | β |
| Device Type | EPLD (UV-erasable / OTP Complex PLD) | CPLD / UV-Erasable / OTP Complex PLD |
| Macrocells | 192 | 192 |
| Process Technology | CMOS, EPROM-based | CMOS (EPROM-based) |
| Propagation Delay (tPD) | 20 ns (pin-compatible speed grade) | 15 ns |
| User I/O Pins (max) | 84 (in PLCC-84 package) | β |
| Supply Voltage | 5 V (single supply, TTL-compatible I/O) | β |
| Operating Temperature Grade | Industrial (I) | Commercial |
| Package Code | QCCJ (Plastic Leaded Chip Carrier, J-bend) | QCCJ |
| Package Type | PLCC-84 (PQCC-84) | β |
| No. of Terminals | 84 | β |
| Form of Terminal | J-BEND | β |
| Mounting Type | Surface Mount (PLCC socket compatible) | β |
| Programmability | UV-erasable / one-time programmable (OTP) | UV-erasable window / OTP |
| Logic Type | Combinatorial and registered, per-macrocell DFF | β |
| I/O Standard | TTL-compatible | β |
| RoHS Status | [DATA_NEEDED: RoHS status - Altera MAX 5000 series is generally legacy and may not be RoHS compliant] | β |
| Device Family | β | MAX 5000 (EPM5192) |
| Dedicated Inputs | β | 7 |
| User I/O Pins | β | 64 |
| Propagation Delay (Industry Variant) | β | 25 ns (per MicrochipUSA listing) |
| Supply Voltage (VCC) | β | 4.75 V to 5.25 V (nominal 5 V) |
| Package | β | 84-pin PLCC (QCCJ, J-bend ceramic) |
| Terminal Form | β | J-BEND |
| Package Shape | β | SQUARE |
| Architecture | β | Programmable Logic Array + Macrocell Registers + PIA interconnect |