EPM5192ALI84-20 vs EPM5192ALC84-20 Comparison

Detailed side-by-side comparison of EPM5192ALI84-20 by Altera and EPM5192ALC84-20 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPM5192ALI84-20 EPM5192ALC84-20
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $9.90 $19.40
Family MAX 5000 β€”
Device Type EPLD (UV-erasable / OTP Complex PLD) UV-Erasable/OTP Complex PLD (EPLD)
Macrocells 192 192
Process Technology CMOS, EPROM-based CMOS
Propagation Delay (tPD) 20 ns (pin-compatible speed grade) β€”
User I/O Pins (max) 84 (in PLCC-84 package) β€”
Supply Voltage 5 V (single supply, TTL-compatible I/O) β€”
Operating Temperature Grade Industrial (I) β€”
Package Code QCCJ (Plastic Leaded Chip Carrier, J-bend) QCCJ (PLCC-84)
Package Type PLCC-84 (PQCC-84) β€”
No. of Terminals 84 β€”
Form of Terminal J-BEND β€”
Mounting Type Surface Mount (PLCC socket compatible) Surface Mount (PLCC socket-compatible)
Programmability UV-erasable / one-time programmable (OTP) β€”
Logic Type Combinatorial and registered, per-macrocell DFF β€”
I/O Standard TTL-compatible β€”
RoHS Status [DATA_NEEDED: RoHS status - Altera MAX 5000 series is generally legacy and may not be RoHS compliant] [DATA_NEEDED: RoHS status not in provided web data]
Series β€” Altera MAX 5000
Speed Grade β€” -20 (20 ns pin-to-pin delay)
Package β€” 84-pin PLCC (Plastic Leaded Chip Carrier)
Terminal Pitch β€” 1.270 mm
Terminal Form β€” J-bend
Package Shape β€” Square
Temperature Grade β€” Commercial
Programming Method β€” UV-erase + EPROM (One-Time-Programmable option)
Logic Family β€” MAX 5000 EPLD
I/O Compatibility β€” TTL-compatible
Configuration Memory β€” EPROM (UV-erasable)

Datasheets & Resources

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