EPM5192AQM100-20 vs EPM5192AQM100-15 Comparison

Detailed side-by-side comparison of EPM5192AQM100-20 by Intel and EPM5192AQM100-15 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPM5192AQM100-20 EPM5192AQM100-15
Brand Intel Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $8.20 $16.20
Device Family MAX 5000 (EPLD / classic CPLD) β€”
Logic Elements 192 macrocells across 12 Logic Array Blocks (LABs) β€”
Number of LABs 12 β€”
User I/O Lines 64 β€”
Dedicated Inputs 7 7
Pin-to-Pin Propagation Delay (tPD) 33 ns β€”
Maximum Clock Frequency (fMAX) 66.7 MHz β€”
Package 100-pin PQFP (JESD-30 code R-PQFP-G100) PQFP-100 (R-PQFP-G100)
Mounting Type Surface Mount Surface Mount
Process Technology CMOS EPROM-based CMOS
Configuration Memory On-chip EPROM (non-volatile, one-time programmable in this package) β€”
Boundary-Scan Test JTAG / IEEE 1149.1 compatible β€”
External Clock Input Yes (global clock pin) β€”
Operating Temperature Grade [DATA_NEEDED: explicit temperature grade from datasheet] β€”
Supply Voltage [DATA_NEEDED: VCC range from datasheet] 5 V (typical, single supply)
RoHS Status [DATA_NEEDED: verified from manufacturer product page] [DATA_NEEDED: RoHS status]
Family β€” MAX 5000
Device Type β€” EPLD (Erasable PLD)
Logic Array Blocks (LABs) β€” 12
Interconnect Architecture β€” Product Term Sharing (PIA)
User I/O Pins β€” 64
Total Inputs β€” 72
Pin-to-Pin Delay (tPD) β€” 25 ns
Speed Grade β€” -15 (15 ns macrocell delay)
Programming Technology β€” EPROM (UV-erasable)
Operating Temperature β€” [DATA_NEEDED: operating temperature range]

Datasheets & Resources

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