EPM5192GC-2 vs EPM5192JI Comparison

Detailed side-by-side comparison of EPM5192GC-2 by Altera and EPM5192JI by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPM5192GC-2 EPM5192JI
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $92.00 $9.75
Family MAX 5000 MAX 5000
Macrocells 192 192
Logic Array Blocks 16 (LABs of 16 macrocells each) β€”
Usable I/O Pins [DATA_NEEDED: exact user I/O count for PGA package] β€”
Propagation Delay (tPD) 12 ns typical (-2 grade) β€”
Counter Frequency 100 MHz minimum β€”
Supply Voltage (VCC) 5 V nominal β€”
Technology CMOS EPROM CMOS EPROM, UV-erasable
Programmable Technology UV-erasable / one-time programmable β€”
Programming Toolchain Altera MAX+PLUS II β€”
Package Type Pin Grid Array (PGA), ceramic β€”
Operating Temperature Commercial (0C to +70C) -40 C to +125 C (industrial, I-suffix)
Speed Grade -2 β€”
RoHS Status Non-Compliant (ceramic PGA, lead-bearing per GlobalSpec listing) [DATA_NEEDED: RoHS status - pre-2010 part, likely non-compliant]
Mounting Type Through-hole (PGA socket) Surface Mount (PLCC socket recommended for UV erasure)
Device Type β€” EPLD (UV-erasable CMOS Programmable Logic Device)
Logic Array Blocks (LABs) β€” 12
User I/O Pins β€” 64
Dedicated Inputs β€” 7
Propagation Delay (tpd) β€” 55 ns
Supply Voltage β€” 4.75 V to 5.25 V (nominal 5 V)
Package β€” 84-pin PLCC (windowed, J-suffix ceramic)
Programming Method β€” Altera MAX 5000 programming algorithm (device programmer)
Erasure Method β€” UV exposure through windowed package

Datasheets & Resources

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