EPM5192GC84-1 vs EPM5192GC1 Comparison
Detailed side-by-side comparison of EPM5192GC84-1 by Altera and EPM5192GC1 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EPM5192GC84-1 | EPM5192GC1 |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $14.20 | $24.50 |
| Family | MAX 5000 | MAX 5000 |
| Product Type | UV-Erasable/OTP Complex PLD (CPLD) | β |
| Technology | CMOS (EPROM-cell based) | β |
| Macrocells | 192 | β |
| Propagation Delay (tPD) | 40 ns (speed grade -1) | β |
| Maximum Clock Frequency | 50 MHz | β |
| Supply Voltage (VCC) | 4.75 V to 5.25 V | 5 V |
| Dedicated Inputs | 7 | β |
| User I/O Pins | 64 | β |
| Total Inputs / Outputs | 72 inputs / 64 outputs | β |
| Architecture | Shared input/clock and shared product terms | β |
| Package | 84-pin PGA (Pin Grid Array), WPGA code | β |
| Temperature Grade | Commercial | β |
| Mounting Type | Through-hole (PGA socket) | Through-hole (PGA) |
| RoHS Status | Compliant (per third-party distributor listing) | unknown |
| Programming Method | UV erasure (quartz window) + EPROM programmer | β |
| Logic Element Type | Macrocells with AND/OR array | β |
| Device Type | β | CPLD (Complex Programmable Logic Device) |
| Macro Cells | β | 192 |
| Usable Gates | β | 3,750 |
| Maximum Operating Frequency | β | 62.5 MHz |
| Programming Technology | β | UV-Erasable / OTP EPROM |
| Package Type | β | Ceramic PGA (Pin Grid Array) |
| Logic Elements | β | 192 macrocells with AND/OR array |
| Process Technology | β | EPROM-based CMOS |
| Operating Temperature | β | [DATA_NEEDED: operating temperature range] |
| Propagation Delay | β | [DATA_NEEDED: tpd specification] |
| Number of Pins | β | [DATA_NEEDED: pin count for GC1 PGA package] |
| Development Tool | β | Altera MAX+PLUS II |