EPM5192GC84-1 vs EPM5192GM Comparison

Detailed side-by-side comparison of EPM5192GC84-1 by Altera and EPM5192GM by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPM5192GC84-1 EPM5192GM
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $14.20 $58.00
Family MAX 5000 β€”
Product Type UV-Erasable/OTP Complex PLD (CPLD) β€”
Technology CMOS (EPROM-cell based) CMOS
Macrocells 192 β€”
Propagation Delay (tPD) 40 ns (speed grade -1) β€”
Maximum Clock Frequency 50 MHz β€”
Supply Voltage (VCC) 4.75 V to 5.25 V β€”
Dedicated Inputs 7 β€”
User I/O Pins 64 β€”
Total Inputs / Outputs 72 inputs / 64 outputs β€”
Architecture Shared input/clock and shared product terms β€”
Package 84-pin PGA (Pin Grid Array), WPGA code CPGA-84 (Ceramic Pin Grid Array, 84 pins, windowed)
Temperature Grade Commercial β€”
Mounting Type Through-hole (PGA socket) Through-Hole (PGA)
RoHS Status Compliant (per third-party distributor listing) Non-compliant (contains lead in ceramic PGA)
Programming Method UV erasure (quartz window) + EPROM programmer β€”
Logic Element Type Macrocells with AND/OR array β€”
Product Family β€” MAX 5000
Device Type β€” UV Erasable Programmable Logic Device (PLD)
Number of Macrocells β€” 192
Usable Gates β€” 3,750
Pin-to-Pin Delay (tPD) β€” 15 ns (fastest speed grade); 55 ns (this part)
Counter Frequency (fCNT) β€” up to 76.9 MHz
Propagation Delay (tPD, this part) β€” 55 ns
Erasure Method β€” UV (windowed ceramic package)
Supply Voltage β€” [DATA_NEEDED: typical VCC range]
Maximum User I/O β€” [DATA_NEEDED: exact I/O count for CPGA-84]
Operating Temperature β€” [DATA_NEEDED: commercial/industrial/military grade]
Process Node β€” [DATA_NEEDED: CMOS process geometry]
Programming Interface β€” JTAG-compatible (per MAX 5000 family)

Datasheets & Resources

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