EPM5192GM-1 vs EPM5192JM Comparison

Detailed side-by-side comparison of EPM5192GM-1 by Altera and EPM5192JM by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPM5192GM-1 EPM5192JM
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Nrnd
Stock Status In Stock In Stock
Unit Price (USD) $27.80 $171.00
Family MAX 5000 MAX 5000
Logic Cells 192 β€”
Propagation Delay (tpd) 55 ns β€”
Process Technology CMOS β€”
Programmable Element UV-erasable EPROM β€”
Package CPGA-84 (Windowed Ceramic PGA) 84-pin Ceramic JLCC with quartz window (J84)
Pin Count 84 β€”
Supply Voltage [DATA_NEEDED: VCC nominal] β€”
Operating Temperature Range [DATA_NEEDED: commercial/industrial/military grade] -55 C to +125 C (military grade, 'M' suffix)
Programmable Macrocells 192 β€”
User I/O Pins [DATA_NEEDED: user I/O count] β€”
Mounting Type Through-Hole (Pin Grid Array socket) β€”
RoHS Compliance unknown (legacy ceramic PGA) β€”
Lead-Free Status unknown β€”
Programming Interface Altera ByteBlaster / JEDEC bitstream β€”
Development Tool Altera MAX+PLUS II (legacy) MAX+PLUS II (legacy Altera toolchain)
Device Type β€” UV-Erasable Programmable Logic Device (EPLD)
Macrocells β€” 192
Maximum User I/O β€” 64
Dedicated Inputs β€” 7
Total Input Channels β€” 72
Propagation Delay (tPD) β€” 55 ns
Supply Voltage (VCC) β€” 4.5 V to 5.5 V (nominal 5 V)
Technology β€” CMOS, UV-erasable
Logic Architecture β€” Shared product-term AND/OR, programmable polarity
Programming Method β€” UV erase + EPROM programmer, JEDEC map
Compliance β€” MIL-STD-883 processing available on /883B suffix variants

Datasheets & Resources

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