EPM5192GM-2 vs EPM5192GM Comparison

Detailed side-by-side comparison of EPM5192GM-2 by Intel and EPM5192GM by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPM5192GM-2 EPM5192GM
Brand Intel Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $92.00 $58.00
Family Altera MAX 5000 β€”
Device Type EPLD (Erasable Programmable Logic Device) UV Erasable Programmable Logic Device (PLD)
Macrocell Count 192 β€”
Logic Elements [DATA_NEEDED: logic element count for MAX 5000 family] β€”
Propagation Delay (tPD) 55 ns β€”
Speed Grade -2 β€”
Process Technology CMOS β€”
Programmability UV-erasable (windowed package) β€”
Package PGA-84 (Ceramic Pin Grid Array, windowed) CPGA-84 (Ceramic Pin Grid Array, 84 pins, windowed)
Pin Count 84 β€”
Mounting Type Through-hole (PGA socket) Through-Hole (PGA)
Operating Temperature [DATA_NEEDED: military/industrial grade temperature range] [DATA_NEEDED: commercial/industrial/military grade]
Supply Voltage [DATA_NEEDED: VCC nominal, typically 5 V for MAX 5000] [DATA_NEEDED: typical VCC range]
RoHS Status [DATA_NEEDED: ceramic PGA with UV window is typically non-RoHS - verify with manufacturer] Non-compliant (contains lead in ceramic PGA)
Datasheet Page Count 52 β€”
Product Family β€” MAX 5000
Technology β€” CMOS
Number of Macrocells β€” 192
Usable Gates β€” 3,750
Pin-to-Pin Delay (tPD) β€” 15 ns (fastest speed grade); 55 ns (this part)
Counter Frequency (fCNT) β€” up to 76.9 MHz
Propagation Delay (tPD, this part) β€” 55 ns
Erasure Method β€” UV (windowed ceramic package)
Maximum User I/O β€” [DATA_NEEDED: exact I/O count for CPGA-84]
Process Node β€” [DATA_NEEDED: CMOS process geometry]
Programming Interface β€” JTAG-compatible (per MAX 5000 family)

Datasheets & Resources

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