EPM5192GM883B-2 vs EPM5192GM Comparison
Detailed side-by-side comparison of EPM5192GM883B-2 by Altera and EPM5192GM by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EPM5192GM883B-2 | EPM5192GM |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Nrnd | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $142.00 | $58.00 |
| Family | MAX 5000 | β |
| Device Type | CPLD (Complex Programmable Logic Device), UV-erasable | UV Erasable Programmable Logic Device (PLD) |
| Macrocells | 192 | β |
| Propagation Delay (tPD) | 45 ns (-2 speed grade) | β |
| Maximum Internal Clock Frequency | 33.3 MHz | β |
| Supply Voltage (VCC, nominal) | 5 V | β |
| Technology | 5 V CMOS | CMOS |
| Dedicated Inputs | 7 | β |
| User I/O Pins | 64 | β |
| Package | 84-pin Ceramic Pin Grid Array (CPGA), code S-CPGA-P84 | CPGA-84 (Ceramic Pin Grid Array, 84 pins, windowed) |
| Package Outline | 28.45 mm square (approx.) | β |
| Military Screening | MIL-STD-883 (per '883' suffix) | β |
| Mounting Type | Through-hole PGA socket | Through-Hole (PGA) |
| Operating Temperature | [DATA_NEEDED: operating temperature range] | [DATA_NEEDED: commercial/industrial/military grade] |
| RoHS Status | non_compliant (ceramic CPGA with MIL-STD-883 screening) | Non-compliant (contains lead in ceramic PGA) |
| JEDEC Package Code | S-CPGA-P84 | β |
| Product Family | β | MAX 5000 |
| Number of Macrocells | β | 192 |
| Usable Gates | β | 3,750 |
| Pin-to-Pin Delay (tPD) | β | 15 ns (fastest speed grade); 55 ns (this part) |
| Counter Frequency (fCNT) | β | up to 76.9 MHz |
| Propagation Delay (tPD, this part) | β | 55 ns |
| Erasure Method | β | UV (windowed ceramic package) |
| Supply Voltage | β | [DATA_NEEDED: typical VCC range] |
| Maximum User I/O | β | [DATA_NEEDED: exact I/O count for CPGA-84] |
| Process Node | β | [DATA_NEEDED: CMOS process geometry] |
| Programming Interface | β | JTAG-compatible (per MAX 5000 family) |