EPM5192IC-1 vs EPM5192JC-1 Comparison

Detailed side-by-side comparison of EPM5192IC-1 by Altera and EPM5192JC-1 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Altera
EPM5192IC-1

EPM5192IC-1 - 192-Macrocell MAX 5000 PLD | Altera | 5V

EPM5192IC-1 Obsolete
Altera
EPM5192JC-1

EPM5192JC-1 - 192-Macrocell UV CPLD, 40ns, 5V | Altera MAX 5000

EPM5192JC-1 Obsolete

Specification Comparison

Parameter EPM5192IC-1 EPM5192JC-1
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $13.95 $22.40
Family MAX 5000 EPLD MAX 5000
Macrocells 192 192
Usable Gates 3750 3750
Dedicated Inputs 7 β€”
I/O Pins 64 β€”
Pin-to-Pin Delay (tPD) 15 ns (max, -1 speed grade) β€”
Counter Frequency (fCNT) 76.9 MHz β€”
Supply Voltage (VCC) 4.75 V to 5.25 V (nominal 5 V) 4.75 V to 5.25 V
Operating Temperature -40C to +85C (industrial) 0 C to +70 C (commercial)
Technology CMOS, UV-erasable, in-system programmable CMOS, UV-Erasable / OTP
Package 68-pin ceramic J-lead (IC-1 suffix) β€”
Programming Interface JTAG / IEEE Std 1149.1 boundary scan Altera MAX programming interface (parallel, pre-JTAG for this family)
Security Bit Yes (design protection) β€”
Supply Current (Icc, typical) [DATA_NEEDED: Icc] mA β€”
Output Drive Current (IOH/IOL) [DATA_NEEDED: IOH/IOL] mA β€”
Device Type β€” CPLD - Complex Programmable Logic Device
Propagation Delay (tPD) β€” 40 ns (speed grade -1)
Maximum Internal Frequency (fMAX) β€” 62.5 MHz
User I/O Pins β€” 84
Package Type β€” 84-pin Ceramic Quad Flat Pack (CQFP), windowed
JEDEC Package Code β€” S-CQCC-J84
Configuration Memory β€” UV-EPROM (erasable under UV lamp)
Process β€” CMOS EPROM
I/O Standard β€” TTL/CMOS 5 V compatible

Datasheets & Resources

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